Résumé
Digital System Design with VHDL is intended both for students on Digital Design courses and practitioners who would like to integrate digital design and VHDL synthesis in the workplace. Its unique approach combines the principles of digital design with a guide to the use of VHDL. Synthesis issues are discussed and practical guidelines are provided for improving simulation accuracy and performance.
Features:
- a practical perspective is obtained by the inclusion of
numerous examples
- applies software engineering practices to encourage
clear coding and adequate documentation of the
process,
- demonstrates the effects of particular coding styles on
synthesis and simulation efficiency
- covers the major VHDL standards
- includes an appendix with examples in Verilog
About the author:
Dr Mark Zwolinski is a Senior Lecturer in the
Department of Electronics and Computer Science at the
University of Southampton. He has written or co-authored
around 50 journal and conference papers in the field of
Electronic Design Automation. He is also a director of LME
Ltd., who supply behavioural. synthesis tools for digital
system design.
Caractéristiques techniques
PAPIER | |
Éditeur(s) | Addison Wesley |
Auteur(s) | mark Zwolinski |
Parution | 01/01/2000 |
Nb. de pages | 323 |
Format | 17 x 23,5 |
Couverture | Broché |
Poids | 566g |
Intérieur | Noir et Blanc |
EAN13 | 9780201360639 |
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