VLSI Design

Using frequent examples, The VLSI Handbook stresses the fundamental theory behind professional applications. Focusing not only on the traditional design methods, it contains all relevant sources of information and tools to assist you in performing your job. This includes software, databases, standards, seminars, conferences and more.

The VLSI Handbook answers all your needs in one comprehensive volume at a level that will enlighten and refresh the knowledge of experienced engineers and educate the novice. This one source reference keeps you current on new techniques and procedures and serves as a review for standard practice. It will be your first choice when looking for a solution.

Features:

• Covers the latest technologies in VLSI circuit design, fabrication, and testing
• Provides articles on research and applied technology
• Focuses on key issues facing the integrated circuit industry including the scaling of circuits, fabrication process, and materials, CAD simulation tools for design and testing
• Discusses automating the design process.

• Chapter 1: VLSI
• Chapter 2: VLSI Technology: A System Perspective
• Chapter 3: CMOS/BiCMOS Technology
• Chapter 4: Bipolar Technology
• Chapter 5: Silicon on Insulator Technology
• Chapter 6: SiGe Technology
• Chapter 7: SiC Technology
• Chapter 8: Passive Components
• Chapter 9: Power IC Technologies
• Chapter 10: Noise in VLSI Technologies
• Chapter 11: Micromachining
• Chapter 12: Microelectronics Packaging
• Chapter 13: Multichip Module Technologies
• Chapter 14: Channel Hot Electron Degradation-Delay in MOS Transistors Due to Deuterium
• Chapter 15: Anneal
• Chapter 16: Devices and Their Models
• Chapter 17: Bipolar Junction Transistor (BJT) Circuits
• Chapter 18: RF Passive IC Components
• Chapter 19: Circuit Simulations
• Chapter 20: Analog Circuit Simulation
• Chapter 21: Interconnect Modeling and Simulation
• Chapter 22: Power Simulation and Estimation in VLSI Circuits
• Chapter 23: Amplifiers
• Chapter 24: CMOS Amplifier Design
• Chapter 25: Bipolar Amplifier Design
• Chapter 26: High-Frequency Amplifiers
• Chapter 27: Operational Transconductance Amplifiers
• Chapter 28: Logic Circuits
• Chapter 29: Expressions of Logic Functions
• Chapter 30: Basic Theory of Logic Functions
• Chapter 31: Simplification of Logic Expressions
• Chapter 32: Binary Decision Diagrams
• Chapter 33: Logic Synthesis with AND and OR Gates in Two Levels
• Chapter 34: Sequential Networks with AND and OR Gates
• Chapter 35: Logic Synthesis with AND and OR Gates in Multi-Levels
• Chapter 36: Logic Properties of Transistor Circuits
• Chapter 37: Logic Synthesis with NAND (or NOR) Gates in Multi-Levels
• Chapter 38: Logic Synthesis with a Minimum Number of Negative Gates
• Chapter 39: Logic Synthesizer with Optimizations in Two Phases
• Chapter 40: Logic Synthesizer by the Transduction Method
• Chapter 41: Emitter-Coupled Logic
• Chapter 42: CMOS
• Chapter 43: Pass Transistors
• Chapter 44: Adders
• Chapter 45: Multipliers
• Chapter 46: Dividers
• Chapter 47: Full-Custom and Semi-Custom Design
• Chapter 48: Programmable Logic Devices
• Chapter 49: Gate Arrays
• Chapter 50: Field-Programmable Gate Arrays
• Chapter 51: Cell-Library Design Approach
• Chapter 52: Comparison of Different Design Approaches
• Chapter 53: Memory, Registers, and System Timing
• Chapter 54: System Timing
• Chapter 55: ROM/PROM/EPROM
• Chapter 56: SRAM
• Chapter 57: Embedded Memory
• Chapter 58: Flash Memories
• Chapter 59: Dynamic Random Access Memory
• Chapter 60: Low-Power Memory Circuits
• Chapter 61: Analog Circuits
• Chapter 62: Nyquist-Rate ADC and DAC
• Chapter 63: Oversampled Analog-to-Digital and Digital-to-Analog Converters
• Chapter 64: RF Communication Circuits
• Chapter 65: PLL Circuits
• Chapter 66: Continuous-Time Filters
• Chapter 67: Switched-Capacitor Filters
• Chapter 68: Microprocessor and ASIC
• Chapter 69: Timing and Signal Integrity Analysis
• Chapter 70: Microprocessor Design Verification
• Chapter 71: Microprocessor Layout Method
• Chapter 72: Architecture
• Chapter 73: ASIC Design
• Chapter 74: Logic Synthesis for Field Programmable Gate Array (FPGA) Technology
• Chapter 75: Test and Testability
• Chapter 76: Testability Concepts and DFT
• Chapter 77: ATPG and BIST
• Chapter 78: CAD Tools for BIST/DFT and Delay Faults
• Chapter 79: Compound Semiconductor Digital Integrated Circuit Technology
• Chapter 80: Materials
• Chapter 81: Compound Semiconductor Devices for Digital Circuits
• Chapter 82: Logic Design Principles and Examples
• Chapter 83: Logic Design Examples
• Chapter 84: Design Automation
• Chapter 85: Internet Based Micro-Electronic Design Automation (IMEDA) Framework
• Chapter 86: System -Level Design
• Chapter 87: Synthesis at the Register Transfer Level and the Behavioral Level
• Chapter 88: Performance Modeling and Analysis in VHDL
• Chapter 89: Embedded Computing Systems and Hardware/Software Co-Design
• Chapter 90: Design Automation Technology Roadmap
• Chapter 91: Algorithms and Architect
• Chapter 92: Algorithms and Architectures for Multimedia and Beamforming Array Processings in
• Chapter 93: Communication Systems
• Chapter 94: Design Languages
• Chapter 95: Design Languages
• Chapter 96: Hardware Description in Verilog: An Introductory Tutorial