Verilog Quickstart

A Practical Guide to Simulation and Synthesis in Verilog

James Lee

356 pages, parution le 31/03/2002 (3^eme édition)

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Résumé

VERILOG Quickstart, THIRD EDITION has been revised and updated in accordance with the new IEEE 1364-2001 standard, much of which applies to synthesizable Verilog. Verilog evolves not only through updated standards, but also through improvements in methodologies, coding styles and tools.

VERILOG Quickstart, THIRD EDITION brings a reader up to date with the standards in coding practices and introduces methodology used on many of today's cutting edge designs. Some of the new features of VERILOG Quickstart, THIRD EDITION are:

State machine style for high-speed glitch-free outputs has been added.
Simple techniques for effective test cycles have been added.
Code Coverage is introduced and the interaction of coding style and code coverage is explored.

VERILOG Quickstart, THIRD EDITION is designed to teach the Verilog language and show the designer how to model in Verilog and to explain the basics of using Verilog simulators.

VERILOG Quickstart, THIRD EDITION is a basic, practical, introductory text book for professionals and students alike. This book explains how a designer can be more effective through the use of Verilog Hardware Description Language to simulate and document a design.

CD ROM Included

The Silos III simulator with many of the 2001 language features.
Over 100 runable examples from the book.

L'auteur - James Lee

James Lee est un hacker Perl, fervent défenseur de l'open source, qui exerce également les fonctions d'administrateur Linux, de consultant en sécurité et de PDG au sein de la société Onsight, qu'il a fondée. Onsight est une société de formation et de conseil spécialisée dans les technologies open source.

Sommaire

List of Figures
List of Examples
List of Tables
Introduction
Introduction to the Verilog Language
Structural Modeling
Starting Procedural Modeling
System Tasks for Displaying Results
Data Objects
Procedural Assignments
Operators
Creating Combinatorial and Sequential Logic
Procedural Flow Control
Tasks and Functions
Advanced Procedural Modeling
User-Defined Primitives
Parameterized Modules
State Machines
Modeling Tips
Modeling Style Trade-Offs
Test Benches and Test Management
Model Organization
Common Errors
Debugging a Design
Code Coverage
Appendix A: Gate-Level Details
Index

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Caractéristiques techniques

	PAPIER
Éditeur(s)	Springer
Auteur(s)	James Lee
Parution	31/03/2002
Édition	3^eme édition
Nb. de pages	356
Format	16 x 24
Couverture	Relié
Poids	675g
Intérieur	Noir et Blanc
EAN13	9780792376729
ISBN13	978-0-7923-7672-9