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Universal Serial Bus System Architecture
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Universal Serial Bus System Architecture

Universal Serial Bus System Architecture

Mindshare Inc., Don Anderson, Dave Dzatko

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505 pages, parution le 01/04/2001 (2eme édition)
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Résumé

Universal Serial Bus System Architecture, Second Edition, based on the 2.0 version of the Universal Serial Bus specification, provides in-depth coverage and a detailed discussion of USB. It focuses on the USB protocol, signaling environment, and electrical spccifications, along with the hardware/ software interaction required to configure and access USB devices. Key topics include:
  • Hot plug support (detection of low-, full-, and high-speed devices)
  • Electrical signaling at the 1.5, 12, and 480Mb/s rates
  • 2.0 hub operation (including split transaction support)
  • 2.0 high-speed protocol (including high-bandwidth and ping transactions)
  • High-speed transceiver test modes
  • Suspend/resume operations
  • Device descriptors
  • Device requests (commands)
  • USB transaction protocols (low-, full-, and high-speed)
  • Bus-powered devices Self-powered devices
  • Error detection and handling
  • Device configuration
  • Device classes
This second edition has been updated to reflect the changes in the USB specification from the original 1.0 to the current 2.0. The USB 2.0 specification defines high-speed transactions operating at 480Mb/s that increase throughput by a factor of 40 over the older USB devices. New high-bandwidth, ping, and split transactions have also been added to further increase efficiency of the high-speed protocol. The USB 2.0 specification makes major improvements to USB, while maintaining backward compatibility with 1.0 and l .I USB devices. If you design or test hardware or software that involves USB, you wouldn't want to miss the important updates in this book. Universal Serial Bus System Architecture, Second Edition, is an essential, time-saving tool.

Contents

I. OVERVIEW OF USB 2.0.

Design Goals of USB.
Shortcomings of the Original PC IO Paradigm.
The USB Paradigm.
How to Get the USB Specifications.

The Big Picture.
Overview.
USB 1.x Systems and Devices.
2.x Systems and Devices.
The Players.
USB Communications Model.
Device Framework (how devices present themselves to software).
USB Peripheral Connection.
Topology.

Cables and Connectors.
The Connectors.
Cables.
Electrical and Mechanical Specifications.

USB Cable Power Distribution.
USB Power.
Hubs.
Bus-Powered Hubs.
Bus-Powered Devices.
Self-Powered Hubs.
Self-Powered Devices.

II. LOW- & FULL-SPEED DEVICE OPERATION.

LS/FS Signaling Environment.
Overview.
Detecting Device Attachment and Speed Detect.
Bus Idle.
Device Reset.
Differential Signaling.
NRZI Encoding.
Bit Stuffing.
Summary of USB Signaling States.

USB LS/FS Transfer Types, Transactions, & Scheduling.
Overview.
Client Initiates Transfer.
Frame-Based Transfers.
Transfer Types.

Packet Definition and Format.
Overview.
Packets—The Basic Building Blocks of USB Transactions.
Token Packets.
Data Packets—Data0 and Data1.
Handshake Packets.
Preamble Packet.
Transactions.

Error Recovery.
Overview.
Packet Errors.
Bus Time-Out.
False EOPs.
Data Toggle Errors.
Special Case: Data Toggle During Control Transfer.
Babble.
Loss of Activity (LOA).
Babble/LOA Detection and Recovery.
Isochronous Transfers (Delivery Not Guaranteed).
Interrupt Transfer Error Recovery.
Bulk Transfer Error Recovery.
Control Transfer Error Recovery.

USB Power Conservation.
Power Conservation-Suspend.
Global Suspend.
Selective Suspend Followed by Global Suspend.
Resume Via Reset.

III. HIGH SPEED DEVICE OPERATION.

Overview of HS Device Operation.
Overview.

The High-Speed Signaling Environment.
Overview.
Detecting High-Speed Device Attachment.
High-Speed Differential Signaling.
High-Speed Start of Packet & Synchronization Sequence.
High-Speed End of Packet (EOP).
Detection High-Speed Device Removal.
High-Speed RESET and Suspend.

HS Transfers, Transactions, and Scheduling.
Overview.
High-Speed Transaction Scheduling.
Periodic Transfers.
Non-Periodic Transfers.

HS Error Detection and Handling.
Overview.
High-Speed Transaction Time-out.
False EOP.
HS Babbling Device Detection.

HS Suspend and Resume.
Overview.
Entering Device Suspend.
Device Resume.

IV. USB 2.0 HUB OPERATION WITH LS/FS/HS DEVICES.

HS Hub Overview.
Overview.
2.0 Hub Attached to High-Speed Port.
USB 2.0 Hub Attached to Full-Speed Port.

2.0 Hub Behavior During HS Transactions.
Overview.
High-Speed Hub Repeater.

2.0 Hub Behavior During LS/FS Transactions.
Overview.
The Structure of Split Transactions.
The Split Start Packet.
The Transaction Translator.
Split Transaction Scheduling.
Periodic Split Transactions.
Non-Periodic Split Transactions.

V. USB DEVICE CONFIGURATION.

Configuration Process.
Overview.
The Configuration Software Elements.
Root Hub Configuration.

USB Device Configuration.
Overview.
Summary of Configuration Process.
How Software Detects Device Attachment & Speed.
Resetting the Port.
Reading and Interpreting the USB Descriptors.
Device States.
Client Software Configuration.

Hub Configuration.
Configuring the Hub.
Reading the Hub's Descriptors.
1.x Hub Descriptors.
High-Speed Capable Hub Descriptors.
Powering the Hub.
Checking Hub Status.
Summary of Hub Port States.

Device Classes.
Overview.
Device Classes.
Audio Device Class.
Communication Device Class.
Display Device Class.
Mass Storage Device Class.
Human Interface Device Class.

VI. USB SOFTWARE OVERVIEW.

USB Host Software.
USB Software.
USB Driver (USBD).
Configuration Management.
Data Transfer Management.
Providing Client Services (The USB Driver Interface).

Appendix.
Overview.
Standard Device Requests.
Set/Clear Feature.
Set/Get Configuration.
Set/Get Descriptor.
Set/Get Interface.
Get Status.
Sync Frame.
Device Tests.
Overview.
Hub Request Types.
Hub Class Requests.
Get/Set Descriptor.
Get Hub Status Request.
Set/Clear Hub Feature Request.
Get Port Status Request.
Set/Clear Port Feature.
Port Test Modes.
Get Bus State.
Overview.
Universal Host Controller Transaction Scheduling.
Transfer Descriptors.
UHC Control Registers.
Overview.
Open Host Controller Transfer Scheduling.
EndPoint Descriptors.
Transfer Descriptors.
The Open Host Controller Registers.

L'auteur - Mindshare Inc.

MindShare Inc. is one of the leading technical training companies in the computer industry, providing innovative courses for dozens of companies, including Compaq, IBM, and Motorola

En savoir plus

L'auteur - Don Anderson

Don Anderson, author and co-author of many MindShare books, passes on his wealth of experience in digital electronics and computer design by training engineers, programmers, and technicians for MindShare.

En savoir plus

L'auteur - Dave Dzatko

David Dzatko

has over ten years of experience designing and testing computer systems. He is currently an instructor with MindShare, Inc., teaching computer architecture to leading companies in the computer industry.

En savoir plus

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Caractéristiques techniques

  PAPIER
Éditeur(s) Addison Wesley
Auteur(s) Mindshare Inc., Don Anderson, Dave Dzatko
Parution 01/04/2001
Édition  2eme édition
Nb. de pages 505
Format 18,6 x 23,2
Couverture Broché
Poids 819g
Intérieur Noir et Blanc
EAN13 9780201309751

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