Co-Verification of Hardware and Software for ARM SoC Design

Jason R. Andrews - Collection Embedded Technology

260 pages, parution le 23/09/2004

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Résumé

Hardware/software co-verification is how to make sure that embedded system software works correctly with the hardware, and that the hardware has been properly designed to run the software successfully -before large sums are spent on prototypes or manufacturing.

This is the first book to apply this verification technique to the rapidly growing field of embedded systems-on-a-chip(SoC). As traditional embedded system design evolves into single-chip design, embedded engineers must be armed with the necessary information to make educated decisions about which tools and methodology to deploy. SoC verification requires a mix of expertise from the disciplines of microprocessor and computer architecture, logic design and simulation, and C and Assembly language embedded software. Until now, the relevant information on how it all fits together has not been available. Andrews, a recognized expert, provides in-depth information about how co-verification really works, how to be successful using it, and pitfalls to avoid. He illustrates these concepts using concrete examples with the ARM core - a technology that has the dominant market share in embedded system product design. The companion CD-ROM contains all source code used in the design examples, a searchable e-book version, and useful design tools.

Sommaire

Embedded System Verification:An Introduction
Hardware and Software Design Process
SoC Verification Topics for the ARM Architecture
Hardware/Software Co-Verification
Advanced Hardware/Software Co-Verification
Hardware Verification Environment and Co-Verification
Methodology for an Example ARM SoC

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Caractéristiques techniques

	PAPIER
Éditeur(s)	Newnes
Auteur(s)	Jason R. Andrews
Collection	Embedded Technology
Parution	23/09/2004
Nb. de pages	260
Format	19 x 23,5
Couverture	Broché
Poids	614g
Intérieur	Noir et Blanc
EAN13	9780750677301
ISBN13	978-0-7506-7730-1